1. Field of the Invention
The present invention relates to a semiconductor member, particularly a semiconductor member suitable for forming an integrated circuit with a high degree of integration, and a semiconductor device comprising the semiconductor member and a functional element formed thereon.
2. Related Background Art
Semiconductor members, typical of which is a monocrystalline Si wafer, have been used as members for forming an integrated circuit and those with better crystal quality have been developed.
Alternatively, a higher degree of integration and a higher speed working have been keenly required for the integrated circuits, as information handed by system machines has been increased. With the advance in higher integration, dimensions of elements such as transistors in the integrated circuit have been made finer and finer, and the reliability of the individual elements has become very important for maintaining or increasing the chip yield over a given level in the process for preparing semiconductor devices. The reliability of the individual elements such as transistors, diodes, etc. largely depends on the surface flatness and crystallinity of a semiconductor member for forming an integrated circuit. For example, in order to attain a degree of integration of 256M bit to 1 G bit level in DRAM, it is necessary that an insulating layer formed on the surface of a semiconductor has a very small thickness such as 1.0 to 1.5 nm. Furthermore, semiconductor members having a crystallinity good enough to form DRAM having a refresh cycle of 64 msec to 128 msec have been desired.
In order to enhance the reliability of transistors, it is essential, besides the aforementioned requirements, to remove metallic or organic contamination and particles present on the surfaces of semiconductor members. To this end, several surface washing processes have been proposed, and a washing process for removing metallic or organic contamination and particles by washing with an aqueous ammonia-hydrogen peroxide solution (NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O) has been regarded as promising up to now.
However, in case of the conventional semiconductor members of bulk Si, etc., the contamination can be removed by washing with an aqueous ammonia-hydrogen peroxide solution of the ordinary composition, i.e. composition in a ratio of NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O=1:1:5 by volume, but such a flat surface before the washing as a surface flatness of 0.2 nm is roughed to about 0.5 nm or more after the washing, and when a MOS-FET is formed thereon, the dielectric strength of gate oxide film fails to satisfy the design requirement.
On the other hand, silicon-on-insulator (SOI) type wafers having the following distinguished characteristics have attracted attention as different semiconductor members from the bulk Si semiconductor members:
1. Easy dielectric isolation with a possibility of higher level integration, PA1 2. Distinguished resistance to radiation, PA1 3. Reduced floating capacity with a possibility of higher speed, PA1 4. Omission of well formation step, PA1 5. Prevention of latch-up, PA1 6. Possibility to form a fully depleted field effect transistor by thin film formation, PA1 7. Possibility to suppress a short channel effect even in microtransistors.
Most widely employed SOI type semiconductor members include two types, i.e. a wafer called SIMOX and an SOI wafer which is formed by bonding two Si wafers to each other (bonded SOI wafer).
SIMOX (separation by ion-implanted oxygen) wafer is formed by implanting oxygen into an Si monocrystalline semiconductor substrate through ion implanting to form an SiO.sub.2 layer inside the Si monocrystalline semiconductor substrate, and by providing an Si monocrystalline semiconductor thin layer on its surface. The SIMOX wafer having such a structure has been now widely employed among the SOI type semiconductor members, because of relatively good matching with the Si semiconductor process. However, in order to form the SiO.sub.2 layer inside the Si monocrystalline semiconductor substrate, oxygen ions must be implanted at least at 10.sup.18 ions/cm.sup.2, and the implantation time is very long and the commercial productivity is not so high. The wafer cost is also high. Furthermore, the Si monocrystalline semiconductor thin layer has many crystal defects generated in the ion implanting step. Thus, the SIMOX wafer cannot have essentially a crystallinity good enough to prepare a high level integrated circuit in good yield. Furthermore, the SIMOX wafer will have a surface flatness of more than several nm, when the surface is washed with the aqueous ammonia-hydrogen peroxide solution, and thus is not suitable for forming a high level integrated circuit thereon.
On the other hand, the bonded SOI wafer is formed from a pair of Si wafers by oxidizing the surface of a first Si wafer to form an SiO.sub.2 layer, bonding a second wafer to the surface of the SiO.sub.2 layer of the first wafer, and then polishing the free surface of the second wafer to form an Si monocrystalline thin layer on the SiO.sub.2 layer. The bonded SOI wafer has a better crystallinity than that of the SIMOX wafer, but the polishing must be carried out under a strict control of the thickness of the Si monocrystalline thin layer. However, it is now very difficult to control the layer thickness control to obtain a layer thickness distribution of less than a few % over the entire wafer surface. Furthermore, the surface of the bonded SOI wafer will be roughed to a surface flatness of 0.5 to 0.8 nm when washed with the aqueous ammonia-hydrogen peroxide solution, and the distinguished characteristics properly possessed by the SOI type wafer cannot be utilized.
As explained above, the surface flatness and the crystallinity of so far available semiconductor members are not always satisfactory for forming semiconductor devices with a high degree of integration and a high speed working on a mass-production scale.